
2–21How Communication Takes Place and I/O Image Table Mapping
7%/,&$6,21 <! 28(0%(4
1794ĆIE4XOE2 Range Selection Bits
Channel No. Input
Channel 0
Input
Channel 1
Input
Channel 2
Input
Channel 3
Output
Channel 0
Output
Channel 1
F0 C0 F1 C1 F2 C2 F3 C3 F4 C4 F5 C5
Decimal Bits
(Octal Bits)
00
08
(10)
01
09
(11)
02
10
(12)
03
11
(13)
04
12
(14)
05
13
(15)
0
" '&0
< 62 " '&
))
21),*74( 5(/(&6 %,6
7// 4$1*( %,6
#+(1 &21),*74(' 62 2)) ,1',8,'7$/ &+$11(/5 9,// 4(6741 24 5(1' (,6+(4 " 24 0 21 (4,(5 02'7/(5 1 (4,(5 02'7/(5 " 24 0 ,5 276376
716,/ 6+( 02'7/( ,5 &21),*74('
1794ĆIE4XOE2 Word/Bit Descriptions
Word
Decimal Bit
(Octal Bit)
Definition
($' #24'
,65
Channel 0 analog data <%,6 /()6 -756,),(' 6925 &203/(0(16 170%(4 7175('
/29(4 %,65 $4( ;(42 <0 75(5 $// %,65
,65 Channel 0 analog data sign bit.
#24'
,65
Channel 1 analog data <%,6 /()6 -756,),(' 6925 &203/(0(16 170%(4 7175('
/29(4 %,65 $4( ;(42 <0 75(5 $// %,65
,65 Channel 1 analog data sign bit.
#24'
,65
Channel 2 analog data <%,6 /()6 -756,),(' 6925 &203/(0(16 170%(4 7175('
/29(4 %,65 $4( ;(42 <0 75(5 $// %,65
,65 Channel 2 analog data sign bit.
#24'
,65
Channel 3 analog data <%,6 /()6 -756,),(' 6925 &203/(0(16 170%(4 7175('
/29(4 %,65 $4( ;(42 <0 75(5 $// %,65
,65 Channel 3 analog data sign bit.
,65
Underrange bits (U) )24 ,1',8,'7$/ &+$11(/5 (4Ć20mA current inputs only) ,6
&244(5321'5 62 ,1376 &+$11(/ %,6 &244(5321'5 62 ,1376 &+$11(/ $1' 52 21
#+(1 5(6 ,1',&$6(5 (,6+(4 $ %42.(1 24 23(1 ,1376 9,4( 24 ,1376 &744(16 ,5 $6 24
%(/29 0
#24'
,65 <
Wire Off bits (W) 744(16 2763765 21/: #+(1 5(6 6+( 9,4( 21 6+( &744(16
276376 ,5 %42.(1 24 6+( /2$' 4(5,56$1&( ,5 622 +,*+ ,6 &244(5321'5 62 &+$11(/
%,6 &244(5321'5 62 &+$11(/ $1' 52 21
,65
26 75('
,6
Power Up bit - included in series B modules only. This bit is always 0 in series
A modules. This bit is set to 1 when all bits in the configuration register (write
word 3) are 0 (unconfigured state). +( &21),*74$6,21 4(*,56(4 &$1 %( &/($4(' %:
(,6+(4 $ 4(5(6 24 %: 6+( 75(4 94,6,1* $// ;(42(5 62 ,6
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