
Table of Contents iii
Publication 1771Ć6.5.116 - July 1996
Chapter 7
Chapter Objective 7-1....................................
Diagnostics Reported by the Module 7-1.......................
Diagnostic Bits Reported By the Analog Input Module 7-1.........
Troubleshooting Chart for the Fast Analog
Input Module (1771ĆIFF/A) 7-3........................
CheckingModule Operation 7-4.............................
Connect the Module in a Simple Test System 7-4...............
Troubleshooting a Bad Input 7-7.............................
Measuring Each Input with Respect to Module Common 7-7.......
Disconnecting Inputs from the Field Wiring Arm One at a Time While
Observing Module Action 7-8..........................
Testing for Input Channel Functionality 7-9...................
Chapter Summary 7-9....................................
Appendix A
Specifications A-1.......................................
Module Scan Time A-2....................................
Resolution A-4..........................................
Appendix B
Sample Programs for the Analog Input Module B-1................
PLCĆ2 Family Processors B-1...............................
PLCĆ3 Family Processor B-2...............................
PLCĆ5 Family Processors B-4...............................
Appendix C
4ĆDigit Binary Coded Decimal (BCD) C-1.......................
C-2..................................................
C-3..................................................
Appendix D
Multiple GET Instructions Ć MiniĆPLCĆ2 and PLCĆ2/20 Processors D-1..
Setting the Block Length (Multiple GET Instructions only) D-3........
Appendix E
Forms E-1.............................................
Troubleshooting Your Input
Module
Specifications
Programming Examples
Data Table Formats
Block Transfer (MiniĆPLCĆ2
and PLCĆ2/20 Processors)
Forms
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