Rockwell-automation T8110B/T8110 Trusted TMR Processor Manual de usuario Pagina 19
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TMR Processor T8110B/T8110
Issue 18 Feb 08 PD-T8110B/T8110 19
RACK 4: [TTMRP_3 – Real time clock input rack]
6 ANALOGUE inputs
Cha
nnel 1
Year
Channel 2
Month
Channel 3
Day of month
Channel 4
Hours
Channel 5
Minutes
Channel 6
Seconds
If the RTC read channel, Channel 2, of TTMRP_5 is set to TRUE, this input rack is refreshed every cycle to hold
the current date and time.
RACK 5: [TTMRP_4 – Real time clock program rack]
6 ANALOGUE outputs
Channel 1
Year
Channel 2
Month
Channel 3
Day of month
Channel 4
Hours
Channel 5
Minutes
Channel 6
Seconds
This output rack (above) allows the application writer to specify a new time and date to be written to the RTC by
the RTC control rack described below. It does not perform the write itself.
RACK 6 [TTMRP_5 – Real time clock control rack]
7 BOOLEAN outputs
Channel 1 RTC Write
TRUE = Set RTC if previously FALSE
FALSE = no associated action
Channel 2 RTC Read
TRUE = Refresh RTC on every subsequent cycle
False = Stop RTC input rack refreshes for every subsequent cycle.
Channel 3
Set year
Channel 4
Set month
Channel 5
Set day of month
Channel 6
Set hours
Chann
el 7
Set minutes
Channel 8
Set seconds
This output rack physically writes the date and time components assigned to the RTC program rack to the RTC.
The write operation is performed in the event of a rising edge on the RTC write channel, Channel 1. The set
channels, Channels 3 – 8, determine which date and time values to write, i.e. only date/time components that
have a corresponding TRUE set channel are written to the RTC. Other date/time components remain
unchanged. The date/time is only written to the RTC if the resulting date/time is valid, otherwise a run-time error
is generated. The RTC read channel, Channel 2, enables/disables refreshes of the RTC input rack on every
subsequent cycle.
- TMR Processor 1
- Table of Contents 4
- Figures 5
- Disclaimer 6
- Revision and Updating Policy 7
- Precautionary Information 7
- Warning 7
- Caution 7
- Associated Documents 7
- 1. Description 8
- 1.3. Power Distribution 9
- 2. Installation 10
- TMR Processor T8110B/T8110 11
- 3. Application 12
- 3.1.6. Chassis Section 16
- 3.3. Inter-Module Bus 21
- 3.4. Isolation 22
- 4. Operation 23
- 4.3. Module Management 24
- 4.4. Security 24
- 4.2. Standby Processor 24
- 4.5. Front Panel 25
- 4.6. Module Status LEDS 26
- 4.7.2. Input Modules 28
- 4.7.3. Output Modules 28
- 4.7.4. Application Execution 29
- 4.7.5. Composite Scan Time 29
- 4.7.6. Example Calculation 30
- 4.8.1. Input modules 31
- 4.8.2. Output Modules 31
- 4.8.3. Application Execution 32
- 4.8.4. Communications 32
- 4.8.5. Example Calculation 33
- 5.1. Testing and Diagnostics 34
- 5.2. Faults 34
- 6. Specifications 36
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