
Trusted
TM
TMR Processor T8110B/T8110
Issue 18 Feb 08 PD-T8110B/T8110 33
4.8.5. Example Calculation
As an example, consider a simple Trusted
TM
system with the following configuration:
Part No. Description Qty. Type
T8110B Trusted
TM
TMR Processor 1 N/A
T8151B Trusted
TM
Communication 2 N/A
T8403 Trusted
TM
TMR 24Vdc Digital Input 4 Input
T8431 Trusted
TM
TMR Analogue Input 1 Input
T8451 Trusted
TM
TMR 24Vdc Digital Output 2 Output
This is a relatively small system with 280 I/O points and 2 communication modules.
Scan Factor No. Input Modules Input Total
4.5 ms x 5 22.5
Scan Factor No. Output Modules Output Total
7 ms x 2 14
No. I/O Modules Application Execution Total
( 7 ) x 0.3 ms 2.1
No. I/O Modules No. Comms
Modules
Communications Total
( 7 ) x 1.5 ms x ( 2
)
21
Input Module Total
22.5 ms
Output Module Total
14 ms
Application Execution Total
2.1 ms
Communications Total
21 ms
Composite Scan Time 59.7 ms
This assumes all modules are polled every scan, all outputs are written every scan and
communications is moderate to heavy. The time may be shortened using scheduled polling, write by
exception and rationalised communications. Note that the application execution time is insignificant.
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