
Detailed Flowcharts
Appendix D
D13
Figure D.14
SEND
Subroutine
SEND
Disable
Processor
Interrupts
Enable UART
Transmit Interrupt
UART
Transmitter
Empty
?
Yes
Disable UART
Transmit Interrupt
No
SLEEP
Suspend at
TXWAIT
Output Byte
to UART
Enable Processor
Interrupts
Return
Indivisible
Zone
NOTE: This figure assumes the use of
a Z80 SIO
Input:
• Link Data Byte
Common:
•
TXW
AIT
: A Sleep V
ariable
10084–I
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