Rockwell-automation FlexPak 3000 Power Module SW-Version 4.3 Manual de usuario descargar pdf (Pagina 182)

APPENDIX D

FlexPak 3000 49’1340 e

D-12

OCL REF REGISTER

*REGISTER

ANALOG IN 1

ANALOG IN 2

FREQUENCY IN

NETW IN REG 1, 2, 3

From Network

From I/O Expansion

Inputs Block Diagram

(OCL REFERENCE)

{

OCL

REFERENCE

SELECT

OCL

FEEDBACK

SELECT

(OCL RAMP OUTPUT)

OCL REF

ROUNDING

S-CURVE

OCL REF RAMP TIME 2)

OCL

LEADLAG

SELECT

output of OCL

enable logic

JERK

RST\

ACC DCC

INITV

output of OCL

enable logic

OCL PI

PROP

GAIN

OCL PI

POSITIVE

LIMIT

OCL PI

LEAD

FREQ

OCL PI

NEGATIVE

LIMIT

WLD LO

RST\

INITV

PI GAIN

MUL

OCL TRIM RANGE

(OCL OUTPUT)

To Speed

Reference

Mode Select

Block Diagram

OCL ENABLE

* BRUSH WEAR

JOG SPEED SELECT

OCL

LEADLAG

RATIO

OCL

LEADLAG

LOW FREQ

(OCL FEEDBACK)

output of OCL

enable logic

(from below)

CML FEEDBACK

ANALOG IN 1

ANALOG IN 2

From I/O Expansion

Inputs Block Diagram

(CML FEEDBACK)

8 sample average

{

Network OCL Enable

Digital Input (term. 12)

NETWORK

TERMBLK

*KEYPAD

CONTROL

SOURCE

SELECT

OFF

Not Running

Running

Drive

Status

(OCL ENABLE)

Outer Control Loop Enable Logic

OCL enable output

(to above)

*NONE

P.800

P.845

P.802

P.803

P.846

P.804

P.847

P.806

P.807

P.805

P.809

P.811

P.812

P.808

P.810

P.848

P.801

P.849

D.13

(A)

(B)

(C)

(A)

(B)

D.13

P.000

AUTO REF.

D.3

SPD LOOP OUTPUT

D.6

ENABLED

I/O Expansion Kit

I/O Expansion

Digital Inputs (terminal 64)

(DIG IN 5)

P.499

(DIG IN 0)

P.490

disable

DIG IN 0 SELECT

P.428

SERIAL

SPD LOOP OUTPUT 3)

ANALOG AUTO REFERENCE 3)

LEAD/LAG

* BYPASS

LAG/LEAD

INITV

L / L

WLD RST\ RATIO

GAIN

MUL

DIV

* DISABLED

TOP SPEED

OCL PROP

TRIM SELECT

P.813

P.011

SPEED RAMP

OUTPUT (RPM)

P.199

NOTES

1) The 'OCL enable' signal must be ON for OCL to execute.

When 'OCL enable' is OFF, the S-curve, Lead/Lag and

PI-blocks are held in reset causing the initial value (INITV)

to be copied to each block's output.

2) The 'OCL reference ramp blockcan be bypassed by

setting OCL REF RAMP TIME to 0.0.

3) Only available through network registers

or the CS3000 software.

Installed

Not Installed

NETW IN REG 1, 2, 3

From Network

Figure D.12 - I/O Expansion Board Outer Control Loop

1 2 ... 177 178 179 180 181 182 183 184 185 186 187 ... 215 216

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Rockwell-automation FlexPak 3000 Power Module SW-Version 4.3 Manual de usuario Pagina 182

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